OpenCL on combined CPU/FPGA systems?

Is there any known effort to implement OpenCL for heterogenous CPU/FPGA systems?

C kernel -> FPGA logic
OpenCL runtime that performs the memory transfers and host/device and device-only operations.

I’m developing such SDK, hope first version will be available soon Q1-Q2 2010. For more information about this project read my blog posts

You might try contacting the developer relations for Xilinx and Altera, although I haven’t heard anything. I know both have some form of C-to-gate compile technology which would seem like a good starting point, but there is a lot of stuff that has to work right to be considered conformant.

AFAIK there is no Xilinx plan on supporting OpenCL.

Have you found somethig else?

Just wanted to bring this back up top.
This seems like the next logical step for OpenCL.

Seems that a company like Imagine (powerVR) would develop there IP using FPGA (guess).
Seems like those types of companies would ‘partner’ with Altera and Xilinx to NOT bring this capapbility to the masses.

Purchasing Imagine type IP is most likely cost prohibative for the garage type shops.
An open FPGA/OpenCL project would make a lot of sense.

At Synapticon we plan to integrate an OpenCL implementation into our DYNARC API that enables developers to use FPGA resources transparently from within popular programming languages.

DYNARC is mainly targeting autonomous system developers but should be also suitable for all other domains where parallel(isable) algorithms are relevant.

As we’re still sensing demand for the integration of OpenCL into our platform, please feel free to state your interest via a short message through our website contact feature so that we can keep you informed about news: