I’m having a hard time understanding memory and subpass dependencies. I will try to explain how I understand it to this point and I would appreciate if you would correct me when I got something wrong.
In my understanding, the pipeline can run through all its stages multiple times between two dependencies. Two draw calls, for example, require the pipeline to run two times; from vertex input to color attachment output. Now lets say we got two subpasses: the first one drawing to a set of color attachments, the second one reading from them and drawing to another set of color attachments.
The first subpass has a dependency to “VK_SUBPASS_EXTERNAL” with srcStageMask being “VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT” to ensure that the subpass is executed only when the previous pipeline invocation has been completed and a new one has been started. dstStageMask is “VK_PIPELINE_STAGE_VERTEX_INPUT_BIT”, to indicate that the subpass is starting execution at this stage.
The second subpass has srcStageMask being “VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT” to ensure that writes to the color attachments have been completed, before starting this subpass. Now, this is the point where my understanding starts to show its flaws: I would now assume that dstStageMask would be “VK_PIPELINE_STAGE_VERTEX_INPUT_BIT” again, indicating that the second subpass starts at a new invocation of the pipeline, drawing new stuff. But the specification says this is invalid, because dstStageMask must be later than srcStageMask to ensure no circular dependency is happening. This kind of destorys my notion that the pipeline runs through its stages multiple times.
I probably got something seriously wrong here, because this doesn’t make any sense to me.